This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-336185, filed on Nov. 1, 2001, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a semiconductor device.
2. Related Background Art
A semiconductor wafer manufactured in front-end steps of a semiconductor fabrication process is diced and cut into individual semiconductor chips. These semiconductor chips are die-bonded and sealed with a molding resin.
A package for sealing a semiconductor chip protects a semiconductor element manufactured on the semiconductor chip. The package generally includes a lead for electrically connecting to a semiconductor element therein.
Because the functions of a semiconductor chip have been developed in recent years, the number of leads necessary for a package has increased, and thereby, the pitch between leads has decreased.
Therefore, a surface-mount-array package, that is, an SMA (Surface Mount Array) has been developed. Particularly, a BGA (Ball Grid Array) is typically used as an SMA package.
FIG. 5 is a sectional view of the package of a conventional semiconductor device 600 using a BGA. A semiconductor chip 10, whose semiconductor element is manufactured in the front-end steps of a semiconductor fabrication process, is mounted on an insulating board 20.
A metallic wiring (refer to FIG. 6) is patterned on the surface and back of the board 20. The metallic wiring is covered with a solder resist layer 50. The semiconductor chip 10 is bonded onto the solder resist layer 50 by an adhesive 40 and fixed to the board 20.
The semiconductor element formed on the semiconductor chip 10 is electrically connected to the metallic wiring by a metallic wire 15. A mold resin 25 seals the semiconductor chip 10 and metallic wire 15 to protect them.
A metallic ball 30 electrically connected to a metallic wiring is formed on the back of the board 20.
FIG. 6 is a further enlarged sectional view showing a part of the semiconductor device 600 in FIG. 5. In FIG. 6, it is shown that a metallic wiring 60a is formed on the surface of the board 20 and a metallic wiring 60b is formed on the back of the board 20.
The metallic wirings 60a and 60b are covered with the solder resist layer 50, and no void is present between the metallic wirings 60a and 60b. 
A through-hole 65 is formed on the board 20. A metal is plated on the inside wall of the through-hole 65. Then, the solder resist layer 50 is filled in the center of the through-hole 65. The through-hole 65 acts as a VIA hole, and the metal on the inside wall of the through-hole 65 electrically connects the metallic wirings 60a and 60b each other.
The semiconductor device 600 shown in FIGS. 5 and 6 is surface-mounted on a printed board or glass board after it is completed. When the semiconductor device 600 is mounted on the printed board or the like, the semiconductor device 600 is heated through a reflowing process.
The adhesive 40 and solder resist 50, the adhesive 40 and semiconductor chip 10, and the solder resist 50 and metallic wiring 60a are usually in close contact with each other.
However, it is impossible to completely prevent voids from being formed between them.
When moisture is contained in these voids, a problem occurs that the moisture in these voids evaporates during the heating process of the semiconductor device 600 and hereby, the air pressure in the voids rises. As a result, the semiconductor chip 10 separates from the board 20.
Even when these voids are not present, the adhesive 40, solder resist 50, or board 20 may absorb moisture. Therefore, a problem also occurs that the moisture absorbed by the adhesive 40, solder resist 50, or board 20 evaporates during the heating process of the semiconductor device 600. Also thereby, the semiconductor chip 10 separates from the board 20.
Therefore, a semiconductor device is desired in which a semiconductor chip does not separate from a board during the heating process of a semiconductor device.
An embodiment of the present invention is provided with an electrically insulating board; conductive interconnections formed on a first face of the board and on a second face opposite to the first face; a semiconductor chip fixed to the board through at least the interconnections on the first face, said semiconductor chip having a semiconductor element electrically connected to the interconnections; a conductive bump formed on the second face of the board and electrically connected to the interconnections on the second face; and a first through-hole passing through the board to ventilate at least a part of the region between the board and the semiconductor chip.